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  MP2110 3a synchronous step-down converter with programmable input current limit MP2110 rev. 1.11 www.monolithicpower.com 1 9/26/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. the future of analog ic technology description the MP2110 is a monolithic step-down switch mode converter with integrated input current limit switch. the step-down converter integrates a main switch and a synchronous rectifier for high efficiency without an external schottky diode. the input average current limit can be externally programmed. it is ideal for powering portable equipment that is powered by an usb port. the MP2110 can supply 3a of load current from a 3.3v to 5.4v continuous input voltage with excellent load and line regulation. the MP2110 input can support up to 12v transient and clamp the current limit switch output at 5.65v (typical). the constant-on-time (cot) control scheme provides fast transient response high light-load efficiency and easy loop stabilization. fault condition protection includes cycle-by-cycle current limit and thermal shutdown. the MP2110 is available in a space-saving 14-pin 3mmx3mm qfn package. features ? high efficiency: up to 95% ? high current step-down converter ? 1.5mhz switching frequency ? 70m ? /50m ? internal power mosfet ? 3a available load current ? 100% low dropout operation ? output voltage as low as 0.6v ? input current limit switch ? programmable current limit: 0.3-3a ? 10% current limit accuracy when current limit > 1a ? wide input voltage range: 3.3v to 5.4v ? 12v input transient tolerance ? 70m ? internal mosfet ? ovp clamp protection ? independent enable pins ? external temperature sense & protection ? internal thermal fault protection ? space saving 3mm x 3mm qfn14 package applications ? wireless modem data cards ? usb powered devices ? cellular and smart phones ? portable instruments a ll mps parts are lead-free and adhere to the rohs directive. ?mps? and ?the future of analog ic technology? are registered trademarks of monolithic power systems, inc. a dam (analog digital adaptive modulation), aam (?.) are trademarks of monolithic power systems, inc. typical application regin pgnd, exposed pad enreg ntc rset sw fb ensys agnd sysin + c2a 330 f c1 10 f c2 22 f r ntc 100k off on c3 22 f on off l1 1 h r1 340k r2 68k r set 1.2k out r4 31.6k
MP2110 ? 3a synchronous buck converter with input current limit MP2110 rev. 1.11 www.monolithicpower.com 2 9/26/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. ordering information part number* package top marking MP2110gq qfn-14 (3mm x 3mm) afq * for tape & reel, add suffix ?z (e.g. MP2110gq?z). package reference top view qfn14 (3x3mm) absolute maximum ratings (1) v sysin , v ntc to gnd ..................... -0.3v to +13v v regin to gnd ............................. -0.3v to +6.5v v sw to gnd....................... -0.3v to v regin +0.3v all other pins to gnd .................. -0.3v to +6.5v continuous power dissipation (t a = +25c) (2) ............................................................ 2.5w junction temperature ............................ +150 c lead temperat ure ................................. +260 c storage temperature .............. -65 c to +150 c recommended operating conditions (3) continuous supply voltage v sysin .. 3.3v to 5.4v transient supply voltage v sysin ................... 12v output voltage v out .......................... 0.6v to 5v operating junction temp. (t j ). -40c to +125c thermal resistance (4) ja jc qfn-14 (3mmx3mm) ............. 50 ...... 12 ... c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation a t any ambient temperature is calculated by p d (max) = (t j (max)-t a )/ ja . exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanen t damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51-7, 4-layer pcb.
MP2110 ? 3a synchronous buck converter with input current limit MP2110 rev. 1.11 www.monolithicpower.com 3 9/26/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. electrical characteristics v sysin = v enreg = 5.0v, v ensys = gnd, l=1 h, t a = +25 c, unless otherwise noted. paramete r symbol condition min typ max units supply current (no switching) i q v fb = 0.63v 190 230 a shutdown current i std v ensys = 5v 3 5 a sysin under voltage lockout threshold v sysin_r rising edge 2.2 2.4 2.6 v sysin under voltage lockout hysteresis v sysin_hys 140 mv regin under voltage lockout threshold v regin_r rising edge 2.5 2.8 3.1 v regin under voltage lockout hysteresis v regin_hys 340 mv regulator input discharge threshold v disch_f sysin falling 2.7 2.9 3.1 v discharge hysteresis v disch_hys 100 mv discharge moseft on resistance r on_disch v sysin = 2.6v 8.5 15 ? external thermal sense trip voltage v nct_r r ntc =ncp18wf104 (100 c), r4=31.6k ? 12.5 14.5 16.5 %v sysin external thermal sense recovery voltage v nct_f r ntc =ncp18wf104 (80 c), r4=31.6k ? 25 27 29 %v sysin system input current limit switch current limit switch on resistance r on_sw i switch =100ma 70 85 m ? current limit i limit1 r set = 13.3k ? 290 390 490 ma i limit2 r set = 5.1k ? 710 810 910 ma i limit3 r set = 3.48k ? 1.05 1.15 1.25 a en input logic low voltage v sysen_l 0.4 v en input logic high voltage v sysen_h 1.5 v en input current i sysen v en = 5v 3.5 7 a output clamping voltage v ovp over voltage protection 5.45 5.65 5.85 v output soft-start time t ss output from 10% to 90% 2.5 ms step-down regulato r feedback voltage v fb 2.7v v regin 6v 0.588 0.600 0.612 v feedback current i fb v fb =0.6v 10 50 na pfet switch on resistance r dson_p v regin =5v 70 m ? nfet switch on resistance r dson_n v regin =5v 50 m ?
MP2110 ? 3a synchronous buck converter with input current limit MP2110 rev. 1.11 www.monolithicpower.com 4 9/26/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. electrical characteristics v sysin = v enreg = 5.0v, v ensys = gnd, l=1 h, t a = +25 c, unless otherwise noted. paramete r symbol condition min typ max units pfet current limit i limit reg 3.9 5 a on time ( 5 ) t on v out =3.6v 520 ns minimum off time ( 5 ) t off 60 ns soft-start time t ss output from 10% to 90% 1.5 ms en input logic low voltage v enreg l 0.4 v en input logic high voltage v enreg h 1.5 v en input current i enreg v en = 0v to 6v -1 1 a thermal shutdown trip threshold ( 5 ) t otp 160 c thermal shutdown hysteresis ( 5 ) t otp _ hys 20 c note: 5) guaranteed by characterization test.
MP2110 ? 3a synchronous buck converter with input current limit MP2110 rev. 1.11 www.monolithicpower.com 5 9/26/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. pin functions pin # name description 1, 2 pgnd power ground. pgnd is internally connected to the source of the low-side n-channel mosfet. 3, 4 regin current limit switch output and buck regulator input. usually this pin connects to a large tantalum capacitor as energy reservoir. 5 enreg on/off control input of step-down regulator. active high. can not be floated. 6 rset input current limit setting pin. a resistor from this pin to ground sets the input current limit. 7 agnd analog ground. internally connects to the analog ground of control circuitry. 8 ensys current limit switch enable input. active low. it has internal pull down resister. 9 fb feedback input. connect fb to the center point of the external resistor divider. the feedback threshold voltage is 0.6v. 10 out sense pin for output voltage. 11 ntc thermistor input. connect a resistor from this pin to sysin pin and the thermistor from this pin to ground. connect to sysin to disable the thermal sense function. 12 sysin supply voltage. sysin supplies power for internal current limit switch. MP2110 operates from a 3.3v to 5.4v continuous input voltage and 12v transient input voltage.c1 is needed to prevent large voltage spikes at the input. put c1as close to the ic as possible. 13, 14 sw power switch output. inductor connection to drains of the internal pfet and nfet switches. exposed pad the exposed pad and pgnd pin must be connected to the same ground plane.
MP2110 ? 3a synchronous buck converter with input current limit MP2110 rev. 1.11 www.monolithicpower.com 6 9/26/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. typical performance characteristics v sysin =v enreg =5.0v, v ensys =gnd, l=1 h, t a =25 c, unless otherwise noted.
MP2110 ? 3a synchronous buck converter with input current limit MP2110 rev. 1.11 www.monolithicpower.com 7 9/26/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. typical performance characteristics (continued) v sysin =v enreg =5.0v, v ensys =gnd, l=1 h, t a =25 c, unless otherwise noted.
MP2110 ? 3a synchronous buck converter with input current limit MP2110 rev. 1.11 www.monolithicpower.com 8 9/26/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. typical performance characteristics (continued) v sysin =v enreg =5.0v, v ensys =gnd, l=1 h, t a =25 c, unless otherwise noted.
MP2110 ? 3a synchronous buck converter with input current limit MP2110 rev. 1.11 www.monolithicpower.com 9 9/26/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. functional block diagram regulator charge pump isense bias&voltage reference cot pulse pwm driver ramp generator comp comp comp comp comp comp ea ea sw soft start 0.6v 0.6v pdrv ndrv sysin ntc enreg fb out pgnd sw regin rset enic soft start ntc enusb current limit vref1 sysin 2.9v discharge comp discharge ok vref2 1.31m ? 219k ? 219k ? 150k ? 500k ? 575k ? hi-z ensys agnd figure 1: functional block diagram
MP2110 ? 3a synchronous buck converter with input current limit MP2110 rev. 1.11 www.monolithicpower.com 10 9/26/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. operation the MP2110 is a high efficiency, 1.5mhz, synchronous step-down converter with input current limit switch. the MP2110 is optimized for low voltage, usb port and li-ion battery powered applications where high efficiency and small size are critical. the MP2110 can achieve 100% duty cycle. MP2110 uses constant on-time control with input voltage feed forward to stabilize the switching frequency over full input range. at light load, MP2110 employs a proprietary control of low side switch and inductor current to eliminate ringing on switching node and improve efficiency. constant on-time control compare to fixed frequency pwm control, constant on-time control offers the advantage of simpler control loop and faster transient response. by using input voltage feed forward, MP2110 maintains a nearly constant switching frequency across input and output voltage range. the on- time of the switching pulse can be estimated as: out on in v t 0.722 s v =? to prevent inductor current run away during load transient, MP2110 fixes the minimum off time to be 60ns. however, this minimum off time limit will not affect operation of MP2110 in steady state. light load operation in light load condition, MP2110 uses a proprietary control scheme to save power and improve efficiency. instead of turning off the low side switch immediately when inductor current start to reverse, MP2110 gradually ramp down and regulates the low side switch current to a minimal level, thus avoids the ringing at switching node that always occurs in discontinuous conduction mode (dcm) operation. current limit MP2110 has a typical 5a current limit for the high side switch. when the hi gh side switch hits current limit, the high side switch will turn off, and low side switch will turn on until the inductor current decreases to the valley current limit. this will prevent inductor current from continuing to build up which will result in damage of the components. short circuit protection MP2110 enters short circuit protection mode after the inductor current hits the current limit and lasts for 100 s, and tries to recover from short circuit with hiccup mode. in short circuit protection, MP2110 will disable output power stage, discharge soft-start cap and then automatically try to soft-start again. if the short circuit condition still holds, MP2110 repeats this operation cycle till short circuit disappears and output rises back to regulation level. programmable input current limit the MP2110 has an input current limit protection function. it will insure that the input current doesn't exceed the maximum value, when the input is supplied by the usb. once the input current triggers the set current limit level, the output current will hold at the current limit until thermal shutdown. the current limit can be estimated as: () () () 6 lim set 0.96x4 ia rk = the input current limit resistor value can be found from table 1. notes: 6) the formula is theoretic. refer to table 1 for accurate current limit setting. table 1?resistor vs. current limit setting i limit (a) r set (k ? ) 0.39 13.3 0.6 7.15 0.81 5.1 1.05 3.92 1.15 3.48 1.52 2.4 1.85 1.96 2.05 1.74 2.25 1.58 2.57 1.37 2.83 1.24 3.08 1.13
MP2110 ? 3a synchronous buck converter with input current limit MP2110 rev. 1.11 www.monolithicpower.com 11 9/26/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. output over voltage clamp as the system input voltage rises up and the current limit switch?s output exceeds its ovp threshold 5.65v, the output voltage (regin) will be clamped to 5.65v. current limit switch output discharge when the current limit switch?s input sysin is lower than 2.9v, MP2110 turns on the discharge mosfet to discharge the regin capacitor storage. discharge resistance is typical 8.5 ? and the specific discharge time depends on the capacitance between regin and gnd. negative thermal coefficient (ntc) thermistor the MP2110 has a built-in ntc comparator that allows it to sense the external device?s temperature via the thermistor mounted near the device. it ensures a safe operating environment and prevents any smoke and fire happen due to over temperature. connect an appropriately- valued resistor from sysin to the ntc-pin and connect the thermistor from the ntc-pin to agnd. the resistor divider with a dividing ratio depends on device temperature determines the voltage on the ntc-pin. once the voltage at the ntc-pin falls to 14.5% of v sysin , the MP2110 output is disabled. the MP2110 restarts if the voltage rises to 27% of v sysin . thermal shutdown thermal shutdown is implemented to prevent the chip from operating at exceedingly high temperatures. when the silicon die temperature is higher than 160c, it shuts down the whole chip. when the temperature is lower than its lower threshold, typically 140c, the chip is enabled again.
MP2110 ? 3a synchronous buck converter with input current limit MP2110 rev. 1.11 www.monolithicpower.com 12 9/26/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. application information output voltage setting the external resistor divider sets the output voltage (see typical application circuit on page 1). choose r1 around 200k ? for optimal transient response. r2 is then given by: 1 v 6 . 0 v 1 r 2 r out ? = table 2?resistor selection vs. output voltage setting v out r1 r2 1v 180k ? (1%) 267k ? (1%) 1.2v 180k ? (1%) 180k ? (1%) 1.8v 180k ? (1%) 88.7k ? (1%) 2.5v 340k ? (1%) 107k ? (1%) 3.3v 340k ? (1%) 75k ? (1%) 3.6v 340k ? (1%) 68k ? (1%) inductor selection a 0.47 h to 4.7 h inductor with dc current rating at least 25% higher than the maximum load current is recommended for most applications. for best efficiency, the inductor dc resistance shall be <200m ? . see table 3 for recommended inductors and manufacturers. for most designs, the inductance value can be derived from the following equation: () osc l in out in out f i v v v v 1 l ? = where il is the inductor ripple current. choose inductor ripple current approximately 30% of the maximum load current, 3a. the maximum inductor peak current is: 2 i i i l load ) max ( l + = under light load conditions below 100ma, larger inductance is recommended for improved efficiency. table 3?suggested surface mount inductors manufacturer part number inductance ( h) max dcr ( ? ) saturation current (a) dimensions lxwxh (mm 3 ) wurth 744777001 1 0.0084 9 7.3x7.3x4.5 toko dfe252012c 1 0.059 3 2.5x2.0x1.2 v sysin input capacitor selection the input capacitor (c1) reduces the surge current drawn from the input and switching noise from the device. the input capacitor impedance at the switching frequency must be less than input source impedance to prevent high frequency switching current passing to the input. ceramic capacitors with x5r or x7r dielectrics are highly recommended because of their low esr and small temperature coefficients. for most applications, a 10 f capacitor is sufficient. v regin capacitor selection the v regin capacitor is used to supply the buck port and with the peak output current, such as during the tdm frame. that output peak current is about 3a. use a large tantalum capacitor to avoid large voltage drops. selecting the output capacitor the output capacitor (c3) is required to maintain the dc output voltage. ceramic capacitors are recommended. low esr capacitors are preferred to keep the output voltage ripple low. the output voltage ripple can be estimated by: out out out esr s1 in s vv 1 v1r fl v 8fc3 ?? ?? = ? + ?? ?? ??? ?
MP2110 ? 3a synchronous buck converter with input current limit MP2110 rev. 1.11 www.monolithicpower.com 13 9/26/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. where l 1 is the inductor value and r esr is the equivalent series resistance (esr) value of the output capacitor. using ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. the output voltage ripple is mainly caused by the capacitance. for simplification, the output voltage ripple can be estimated by: out out out 2 s1 in vv v1 8f l c3 v ?? =? ?? ?? in the case of tantalum or electrolytic capacitors, the esr dominates the impedance at the switching frequency. for simplification, the output ripple can be approximated to: out out out esr in s1 vv v1r fl v ?? =? ?? ?? the characteristics of the output capacitor also affect the stability of the regulation system. pc board layout pcb layout is very important to achieve stable operation. for best results, follow these guidelines and use figure 2 as reference: 1) use large ground plane directly connect to pgnd pin. add vias near the pgnd pin if bottom layer is ground plane. 2) place the ceramic input capacitor close to sysin/regin and pgnd pins. keep the connection of input capacitor and sysin/regin pin as short and wide as possible. 3) route sw away from sensitive analog areas such as fb, out pins. it?s not recommended to route sw trace under chip?s bottom side. 4) place the feedback resistors close to chip to ensure the trace which connects to fb pin as short as possible. c2 c3 vout vout top layer bottom layer gnd sysin gnd gnd regin v o ut c2a r6 r1 r2 c4 r4 r ntc c1 c1a c3 c3a l1 figure 2: pcb layout design example below is a design example following the application guidelines for the specifications: table 4?design example v in 5v v out 3.6v i out 3a the detailed application schematic is shown in figure 3. the typical performance and circuit waveforms have been shown in the typical performance characteristics section. for more device applications, please refer to the related evaluation board datasheet.
MP2110 ? 3a synchronous buck converter with input current limit MP2110 rev. 1.11 www.monolithicpower.com 14 9/26/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. typical application circuits regin pgnd enreg ntc rset sw fb ensys agnd sysin + c2a 330 f c1a 10 f c2 22 f r ntc 100k c3a 22 f l1 1 h r1 340k r2 68k r6 1.2k 1, 2 3, 4 5 6 exposed pad 8 9 11 12 13,14 7 out r4 31.6k c1 1 f c4 ns c3 22 f 10 figure 3: typical application, 3.6v output voltage
MP2110 ? 3a synchronous buck converter with input current limit notice: the information in this document is subject to change without notice. please contact mps for current specifications. users should warrant and guarantee that third party intellectual property rights are not infringed upon when integrating mps products into any application. mps will not assume any legal responsibility for any said applications. MP2110 rev. 1.11 www.monolithicpower.com 15 9/26/2014 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. package information qfn-14 (3mm x 3mm) side view bottom view note: 1) all dimensions are in millimeters. 2) exposed paddle size does not include mold flash. 3) lead coplanarity shall be 0.10 millimeters max. 4) jedec reference is mo-229. 5) drawing is not to scale. pin 1 id marking top view pin 1 id index area recommended land pattern pin 1 id see detail a pin 1 id option a 0.30x45 typ. pin 1 id option b r0.20 typ. detail a


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